{"id":17,"date":"2022-07-16T22:15:10","date_gmt":"2022-07-16T14:15:10","guid":{"rendered":"https:\/\/www.corticalchip.com\/?page_id=17"},"modified":"2026-03-03T16:13:27","modified_gmt":"2026-03-03T08:13:27","slug":"%e8%ae%ba%e6%96%87%e4%b8%93%e5%88%a9","status":"publish","type":"page","link":"https:\/\/www.corticalchip.com\/index.php\/%e8%ae%ba%e6%96%87%e4%b8%93%e5%88%a9\/","title":{"rendered":"\u8bba\u6587\u4e13\u5229"},"content":{"rendered":"\n

\u53d1\u8868\u8bba\u6587<\/strong><\/p>\n\n\n\n

\u3000[2026\u5e74]<\/mark><\/strong>
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  1. ATW-SNN: Low-Accuracy-Loss Asymmetric Ternary-Weight Spiking Neural Network with Spike Calibration Strategy<\/a><\/mark>
       Yihang Chen, Haoran Gao, Yingcheng Lin, Cong Shi*<\/strong>. Neuromorphic Computing and Engineering<\/strong><\/em>, 2026, 6(1). \uff08SCI\uff0c 1\u533a\uff09<\/strong>


    [2025\u5e74]<\/mark><\/strong>

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  2. MorphBungee-Tiny: An Ultra-Low-Cost FPGA Implementation of Neuromorphic Architecture With High-Accuracy On-Chip E-Prop Learning<\/a><\/mark>
        Zhengqing Zhong, Jialin Yang, Haibing Wang, Ying Jiang, Yingcheng Lin, Ping Gan, Liyuan Liu, Liang Liang, Cong Shi*<\/strong>. IEEE Transactions On Circuits and Systems II: Express Briefs<\/strong><\/em>, 2025, 72(12), 2012-2016.\uff08SCI\uff0c 1\u533a\uff09<\/strong>

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  3. A 128 \u00d7 128 monolithic spike-based hybrid-vision sensor with 0.96 Geps and 117 kfps<\/a><\/mark>
    \u00a0 \u00a0\u00a0Huanhui Zhang,\u00a0Chi Zhang,\u00a0Xu Yang,\u00a0Zhe Wang,\u00a0Cong Shi<\/strong>,\u00a0Runjiang Dou,\u00a0Shuangming Yu,\u00a0Jian Liu,\u00a0Nanjian Wu,\u00a0Peng Feng*\u00a0and\u00a0Liyuan Liu. Journal of Semiconductors<\/strong><\/em>, 2025, 46(9), 1-8. \uff08SCI\uff0c1\u533a\uff09<\/strong>

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  4. STOP: Spatiotemporal Orthogonal Propagation for Weight-Threshold-Leakage Synergistic Training of Deep Spiking Neural Networks<\/a><\/mark>
        Haoran Gao, Xichuan Zhou, Yingcheng Lin, Min Tian, Liyuan Liu, Cong Shi*<\/strong>. Neuromorphic Computing and Engineering<\/strong><\/em>, <\/strong>2025, 5(4), 1-18. \uff08SCI\uff0c1\u533a\uff09<\/strong>

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  5. Memory-Efficient LoRA-based Spiking Neural Network Training for Edge Neuromorphic Processors<\/mark>
         <\/strong>Lu Yu, Haoran Gao, Junxian He, Junfeng You, Ying Jiang, Yingcheng Lin, Xu Yang, Liyuan Liu, Cong Shi*<\/strong>. International Conference on Frontiers Technology in Circuits and Systems (FTCS)<\/em><\/strong>, 2025. (Accepted)

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  6. A Sub-100\u03bcs-Latency Visual-Cortex-Mimicking Heterogeneous Multi-Core Edge Neuromorphic Processor Enabling On-Chip High-Accuracy Learning<\/mark>
         Junxian He , Ying Jiang , Zhengqing Zhong , Mingju Chen , Liyuan Liu , Cong Shi*<\/strong>, IEEE International Conference on ASIC (ASICON)<\/em><\/strong><\/em><\/strong>, 2025. (Accepted)

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  7. A 10,000 Inference\/s Bio-Inspired Spiking Vision Chip Based on An End-to-End SNN Embedding Image Signal Enhancement<\/a><\/mark>
        Xu Yang, Fuming Lei, Na Tian, Cong Shi<\/strong>, Zhe Wang, Shuangming Yu, Runjiang Dou, Peng Feng, Nan Qi, Zhongming Wei, Jian Liu, Kaiyou Wang, Nanjian Wu, Liyuan Liu*. IEEE Journal of Solid-state Circuits<\/strong><\/em>, <\/strong>2025, doi: 10.1109\/JSSC.2025.3583310. (Early Access).\uff08SCI\uff0c1\u533a\uff09<\/strong>

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  8. AM-CIM: Approximate Memory Based Near Sensor Compute-in-Memory Architecture for Keyword Spotting<\/a><\/mark>
        Yuhao Liu, Xiaotao Jia*, Guangcai Yuan, Jianyi Yu, Cong Shi<\/strong>, Qi Wei, Youguang Zhang, Weisheng Zhao, Fei Qiao*.IEEE Transactions on Circuits and Systems I: Regular Papers<\/strong><\/em>, 2025, doi: 10.1109\/TCSI.2025.3580398. (Early Access)\uff08SCI\uff0c1\u533a\uff09<\/strong>

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  9. \u4e00\u79cd\u57fa\u4e8e\u6a21\u62df\u57df\u7279\u5f81\u63d0\u53d6\u7684\u8bed\u97f3\u6d3b\u52a8\u68c0\u6d4b\u7535\u8def<\/a>
        \u4f55\u5efa\u5e73\uff0c\u6768\u5175\uff0c\u5f20\u9759\uff0c\u4e54\u98de*\uff0c\u8d3e\u51ef\u6b4c\uff0c\u9b4f\u7426\uff0c\u5218\u7389\u6d69\uff0c\u55bb\u5251\u4f9d\uff0c\u77f3\u5306<\/strong>. \u7269\u8054\u7f51\u6280\u672f<\/em> <\/strong>. 2025 ,15 (05),16-20.

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  10. A Visual-Cortex-Mimetic Tiny Neuromorphic Vision Processor Based on Reconfigurable Cortical Neuron Unit<\/a><\/mark>
        Mingju Chen, Junxian He, Haibing Wang, Tengxiao Wang, Haoran Gao, Liyuan Liu, Ying Wang, Cong Shi*<\/strong>. IEEE Transactions <\/strong><\/em>On Circuits and Systems II: Express Briefs<\/em><\/strong><\/strong>, <\/strong>2025, 72(7), 943-947.\uff08SCI\uff0c1\u533a\uff09<\/strong>

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  11. An Edge Neuromorphic Processor With High-Accuracy On-Chip Aggregate-Label Learning<\/a>
        Guanyu Chen, Mingju Chen, Tengxiao Wang, Haibing Wang, Xiang Fu, Yingcheng Lin, Liyuan Liu, Cong Shi*<\/strong>. IEEE Transactions <\/strong><\/em>On Circuits and Systems II: Express Briefs<\/em><\/strong>, <\/strong>2025, 72(3), 509-513.\uff08SCI\uff0c1\u533a\uff09<\/strong>

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  12. MorphBungee: A 65-nm 7.2-mm2<\/sup> 27-\u03bcJ\/image Digital Edge Neuromorphic Chip with On-Chip 802-frame\/s Multi-Layer Spiking Neural Network Learning<\/a><\/mark>
        Tengxiao Wang, Min Tian, Haibing Wang, Zhengqing Zhong, Junxian He, Fang Tang, Xichuan Zhou, Yingcheng Lin, Shuang-Ming Yu, Liyuan Liu, Cong Shi*<\/strong>. IEEE Transactions on Biomedical Circuits and Systems<\/strong><\/em>, <\/strong>2025, 19(1), 209-225. \uff08SCI\uff0c1\u533a\uff09<\/strong>

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  13. MorphBungee-Lite: An Edge Neuromorphic Architecture With Balanced Cross-Core Workloads Based on Layer-Wise Event-Batch Learning\/Inference<\/a><\/mark>
        Zhengqing Zhong, Haibing Wang, Mingju Chen, Yingcheng Lin, Min Tian, Tengxiao Wang, Liyuan Liu, Cong Shi*<\/strong>. IEEE Transactions On Circuits and Systems II: Express Briefs<\/em><\/strong>, 2025, 72(1), 293 – 297\uff08SCI, 1\u533a<\/strong>\uff09


    [2024\u5e74]<\/mark><\/strong>

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  14. A Visual Cortex-Inspired Edge Neuromorphic Hardware Architecture With On-Chip Multi-Layer STDP Learning<\/a><\/mark>
        Junxian He, Min Tian, Ying Jiang, Haibing Wang, Tengxiao Wang, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Ying Wang, Cong Shi*<\/strong>. Computers and Electrical Engineering<\/em><\/strong>, 2024, 120:109806\uff08SCI\uff0c 1\u533a\uff09<\/strong>

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  15. LLD-GAN: An End-to-End Network for Low-Light Image Demosaicking<\/a><\/mark>
        Li Wang, Cong Shi*<\/strong>, Shrinivas Pundlik, Xu Yang, Liyuan Liu, Gang Luo. Displays<\/em><\/strong>, 2024, 85:102856. \uff08SCI\uff0c1\u533a\uff09<\/strong>

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  16. NeuroCam: A Neuromorphic Intelligent CameraSystem for Face Recognition<\/a><\/mark>
        Jialin Yang, Haibing Wang*, Zhengging Zhong, Mingju Chen, Ying Jiang, Yangfan Huang, Cong Shi<\/strong>. 2024 4th<\/em><\/strong> International Conference on Intelligent Technology and Embedded Systems (ICITES)<\/em><\/strong>, September 20-23, 2024, Chengdu, China.

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  17. Ghost Reservoir: A Memory-Efficient Low-Power and Real-Time Neuromorphic Processor of Liquid State Machine with On-Chip Learning<\/a><\/mark>
        Cong Shi<\/strong>, Xiang Fu, Haibing Wang, Yingcheng Lin, Ying Jiang, Liyuan Liu, Nanjian Wu, Min Tian*. <\/strong>IEEE Transactions on Circuits and Systems II: Express Briefs<\/strong><\/em>:  2024, 71(10), 4526-4530.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  18. A Real-Time 2D\/3D Perception Visual Vector Processor for 1920 \u00d7 1080 High-Resolution High-Speed Intelligent Vision Chips<\/a><\/mark>
         Siyuan Wei, Ke Ning, Lei Kang, Xueming Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi<\/strong>, Nanjian Wu, Liyuan Liu. IEEE Transactions on Circuits and Systems I: Regular Papers<\/strong><\/em>: 2024, 71(2), 740-753.\uff08SCI\uff0c1\u533a\uff09<\/strong>


    [2023\u5e74]<\/mark><\/strong>

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  19. NORP: A Compact Neuromorphic Olfactory Recognition Processor with On-Chip Hybrid Learning<\/a><\/mark>
         Cong Shi<\/strong>, Yuxuan Wang, Fengchun Tian, Xiang Fu, Haibing Wang, Jingya Zhang, Haoran Gao, Shukai Duan, Lidan Wang, Min Tian*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>, 2023, 31-32.

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  20. An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips<\/a>
         Leyi Chen, Cong Shi<\/strong>, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Min Tian*. IEEE Transactions on Circuits and Systems I: Regular Papers<\/em><\/strong>: 2023, 70(11), 4249-4259.\uff08SCI\uff0c1\u533a\uff09<\/strong>

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  21. MorphBungee: A 65nm 7.2mm2<\/sup> 27\u03bcJ\/image Digital Edge Neuromorphic Chip with On-Chip 802 frame\/s Multi-layer Spiking Neural Network Learning<\/a><\/mark>
        Tengxiao Wang, Min Tian, Zhengqing Zhong, Haibing Wang, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Nanjian Wu, Liyuan Liu, Cong Shi*<\/sup><\/strong>, 2023 IEEE Asian Solid-State Circuits Conference (ASSCC)<\/em><\/strong>, 2023, 1-3.

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  22. Live Demonstration: Face Recognition at The Edge Using Fast On-Chip Deep Learning Neuromorphic Chip<\/a>
        Zhengqing Zhong, Tengxiao Wang, Haibing Wang, Zhihua Zhou, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*<\/strong>. <\/strong>2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)<\/strong><\/em>, 2023, 1-2.

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  23. A 24.3\u03bcJ\/Image SNN Accelerator for DVS-Gesture with WS-LOS Dataflow and Sparse Methods<\/a>
        Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi<\/strong>, Jian Liu, Nanjian Wu, Liyuan Liu*. <\/strong>IEEE Transactions on Circuits and Systems II: Express Briefs<\/strong><\/em>: 2023, 70(11), 4226-4230.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  24. Network Pruning for Bit-Serial Accelerators<\/a>
        Xiandong Zhao, Ying Wang*, Cheng Liu, Cong Shi<\/strong>, Kaijie Tu, Lei Zhang. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems<\/em><\/strong>: 2023, 42(5), 1597-1609.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  25. Low-Cost Real-Time VLSI System for High-Accuracy Optical Flow Estimation Using Biological Motion Features and Random Forests<\/a>
        Cong Shi<\/strong>, Junxian He, Shrinivas Pundlik, Xichuan Zhou*, Nanjian Wu, Gang Luo. Science China Information Sciences<\/strong><\/em>: 2023, 66(5), 159401.\uff08SCI\uff0c2\u533a\uff09<\/strong>\uff08    PDF\u4e0b\u8f7d<\/a>\uff09

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  26. An Edge Neuromorphic Hardware with Fast On-Chip Error-Triggered Learning on Compressive Sensed Spikes<\/a><\/mark>
         Cong Shi<\/strong>, Jingya Zhang, Tengxiao Wang, Zhengqing Zhong, Junxian He, Haoran Gao, Jianyi Yu, Ping Li, Min Tian*. IEEE Transactions on Circuits and Systems II: Express Briefs<\/em><\/strong>: 2023, 70(7), 2665-2669.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  27. A Configurable On-Chip Spike Encoding Network Based on Dual-Mode Integrate & Fire Neurons<\/a><\/mark>
         Zhengqing Zhong, Yunpeng Tuo*, Haibing Wang, Tengxiao Wang, Junxian He, Min Tian, Cong Shi<\/strong>. IEEE 6th Information Technology, Networking, Electronic and Automation Control Conference(ITNEC)<\/em><\/strong>: 2023, 1445-1449.


    [2022\u5e74]<\/strong>

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  28. \u9762\u5411\u8fb9\u7f18\u5e94\u7528\u7684\u8109\u51b2\u89c6\u89c9\u4f20\u611f\u5668<\/a>
         \u7ae0\u5ba6\u6167, \u5eb7\u78ca, \u7530\u5a1c, \u6768\u65ed,\u51af\u9e4f, \u77f3\u5306<\/strong>, \u5218\u5251, \u5434\u5357\u5065, \u5218\u529b\u6e90*. \u5fae\u7eb3\u7535\u5b50\u4e0e\u667a\u80fd\u5236\u9020<\/em><\/strong>: 2022, 4(4), 62-70.

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  29. \u7269\u7aef\u795e\u7ecf\u5f62\u6001\u7c7b\u8111\u82af\u7247\u8bbe\u8ba1\u7efc\u8ff0<\/a>
         \u949f\u6b63\u9752, \u738b\u817e\u9704, \u5218\u529b\u6e90, \u5434\u5357\u5065, \u7530\u654f, \u77f3\u5306*<\/strong>. \u5fae\u7eb3\u7535\u5b50\u4e0e\u667a\u80fd\u5236\u9020<\/em><\/strong>: 2022, 4(3), 19-30.

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  30. An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips<\/a><\/mark>
         Leyi Chen, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Cong Shi<\/strong>, Min Tian*. IEEE Asia Pacific Conference on Circuits and Systems<\/strong><\/em> (APCCAS)<\/em><\/strong>: 2022, 1-5.(Best Paper Award)<\/strong>

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  31. TEDOP: a Tiny Event-Driven Neural Network Hardware Core Enabling On-Chip Spike-Driven Synaptic Plasticity<\/a><\/mark>
         Cong Shi<\/strong>, Sihao Chen, Haibing Wang, Zhengqing Zhong, Ping Li, Junxian He, Tengxiao Wang, Jianyi Yu, Min Tian*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>: 2022, 62-63.

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  32. MorphBungee: An Edge Neuromorphic Chip for High-Accuracy On-Chip Learning of Multiple-Layer Spiking Neural Networks<\/a><\/mark>
        Tengxiao Wang, Haibing Wang, Junxian He, Zhengqing Zhong, Fang Tang, Xichuan Zhou, Shuang-Ming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*<\/strong>. IEEE Biomedical Circuits and Systems Conference (BioCAS)<\/em><\/strong>: 2022, 255-259.

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  33. TripleBrain: A Compact Neuromorphic Hardware Core with Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity<\/a>
        Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi*<\/strong>. IEEE Transactions on Biomedical Circuits and Systems<\/em><\/strong>: 2022, 16(4), 636-650.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  34. A Novel SiC MOSFET With a Fully Depleted P-Base MOS-Channel Diode for Enhanced Third Quadrant Performance<\/a>
        Ping Li, Rongyao Ma, Jingyu Shen, Liang Jing, Jingwei Guo, Zhi Lin, Shengdong Hu*, Cong Shi<\/strong>, Fang Tang. IEEE Transactions on Electron Devices<\/em><\/strong>: 2022, 69(8), 4438-4443.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  35. A Lightweight Spiking GAN Model for Memristor-Centric Silicon Circuit with On-Chip Reinforcement Adversarial Learning<\/a><\/mark>
        Min Tian, Jing Lu*, Haoran Gao, Haibing Wang, Jianyi Yu, Cong Shi<\/strong>. IEEE International Symposium on Circuits & Systems (ISCAS)<\/strong><\/em>: 2022, 3388-3392.

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  36. A Low-cost FPGA Implementation of Spiking Extreme Learning Machine With On-chip Reward-Modulated STDP Learning<\/a>
        Zhen He, Cong Shi*<\/strong>, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo. IEEE Transactions on Circuits and Systems II: Express Briefs<\/em><\/strong>: 2022, 69(3), 1657-1661.\uff08SCI\uff0c2\u533a\uff09<\/strong>


    [2021\u5e74]<\/strong>

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  37. TripleBrain: An Edge Neuromorphic Architecture for High-accuracy Single-layer Spiking Neural Network with On-chip Self-organizing and Reinforcement Learning<\/a>
         Haibing Wang, Zhen He, Jinsong Rao, Tengxiao Wang, Junxian He, Min Tian, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Cong Shi*<\/strong>. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>: 2021, 88-89.

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  38. A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors<\/a>
        Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi*<\/strong>. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>: 2021, 51-52.

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  39. DeepTempo: a Hardware-Friendly Direct Feedback Alignment Multi-Layer Tempotron Learning Rule for Deep Spiking Neural Networks<\/a>
         Cong Shi*<\/strong>, Tengxiao Wang, Junxian He, Jianghao Zhang, Liyuan Liu, Nanjian Wu. IEEE Transactions on Circuits and Systems II: Express Briefs<\/em><\/strong>: 2021, 68(5), 1581-1585. \uff08SCI\uff0c2\u533a\uff0cinvited paper\uff09<\/strong>

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  40. An Edge 3D CNN Accelerator for Low Power Activity Recognition<\/a>
         Ying Wang, Yongchen Wang, Long Cheng, Cong Shi<\/strong>, Huawei Li*, Xiaowei Li. IEEE<\/em> Transactions on Computer-Aided Design of Integrated Circuits and Systems<\/em><\/strong>: 2021, 40(5), 918-930. \uff08SCI\uff0c2\u533a\uff09<\/strong>

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  41. Hapke Data Augmentation for Deep Learning Based Hyperspectral Data Analysis with Limited Samples<\/a>
         Kai Qin, Fangyuan Ge, Yingjun Zhao, Ling Zhu, Ming Li, Cong Shi, <\/strong>Dong Li, Xichuang Zhou*. IEEE Geoscience and Remote Sensing Letters<\/em><\/strong>: 2021, 18(5), 886-890.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  42. Exploiting Memristors for Neuromorphic Reinforcement Learning<\/a>
         Cong Shi<\/strong>, Jing Lu, Ying Wang, Ping Li, Min Tian*. IEEE International Conference on Artificial Intelligence Circuits & Systems (AICAS)<\/strong><\/em><\/strong>: 2021, 1-4.

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  43. A Low-cost High-speed Object Tracking VLSI System Based on Unified Textural and Dynamic Compressive Features<\/a>
      Wei He, Jie Zhang, Yingcheng Lin, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi*<\/strong>. IEEE Transactions on Circuits and Systems II: Express Briefs<\/em><\/strong>: 2021, 68(3), 1013-1017.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  44. A Novel Approach to Inactivate the Body p-i-n Diode of SiC MOSFET by Using the Normally-off JFET<\/a>
      Ping Li, Jingwei Guo, Zhi Lin, Shengdong Hu, Cong Shi<\/strong>, Fang Tang*. IEEE Transactions on Electron Devices<\/em><\/strong>: 2021, 68(4), 1784-1790.\uff08SCI\uff0c2\u533a\uff09<\/strong>

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  45. A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition<\/a>
         Xichuan Zhou, Zhenghua Zhou, Zhengqing Zhong, Jianyi Yu, Tengxiao Wang, Min Tian, Ying Jiang, Cong Shi*<\/strong>. IEEE International Symposium on Circuits & Systems (ISCAS)<\/strong><\/em>: 2021, 1-5.

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  46. Optimizing Information Theory Based Bitwise Bottlenecks for Efficient Mixed-Precision Activation Quantization<\/a>    Xichuan Zhou*, Kui Liu, Cong Shi<\/strong>, Haijun Liu, Ji Liu. AAAI Conference on Artificial Intelligence (AAAI)<\/em><\/strong>: 35(4), 3590-3598, 2021.

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  47. CompSNN: A Lightweight Spiking Neural Network Based on Spatiotemporally Compressive Spike Features<\/a>
         Tengxiao Wang, Cong Shi*<\/strong>, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo. Neurocomputing<\/em><\/strong>: 2021, 425(15), 96-106. \uff08SCI\uff0c2\u533a\uff09<\/strong>


    [2020\u5e74]<\/strong>

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  48. BitPruner: Network Pruning for Bit-serial Accelerators<\/a>
         Xiandong Zhao, Ying Wang*, Cheng Liu, Cong Shi<\/strong>, Kaijie Tu, Lei Zhang. ACM\/IEEE Design Automation Conference (DAC)<\/em><\/strong>: 2020, No. 47, 1-6.

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  49. A High-speed Low-cost CNN Inference Accelerator for Depthwise Separable Convolution<\/a>
         Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Ying Jiang, Liyuan Liu, Nanjian Wu, Cong Shi*<\/strong>. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>: 2020, 63-64.

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  50. Without low spatial frequencies, high resolution vision would be detrimental to motion perception<\/a>
         Cong Shi*<\/strong>, Shrinivas Pundlik, Gang Luo*. Journal of Vision<\/em><\/strong>: 2020, 20(8), 29.  \uff08SCI\uff0c3\u533a\uff09<\/strong>

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  51. MoNet3D: Towards Accurate Monocular 3D Object Localization in Real Time<\/a>
         Xichuan Zhou*, Yicong Peng, Chunqiao Long, Fengbo Ren, Cong Shi<\/strong>. International Conference on Machine Learning (ICML)<\/strong><\/em>: no. 119,11503-11512, 2020.

    <\/li>\n\n\n\n
  52. A Low Reverse Recovery Charge Superjunction MOSFET with P-base and N-pillar Schottky Contacts<\/a>
         Ping Li*, Zhi Lin, Shengdong Hu, Cong Shi<\/strong>, Fang Tang. IEEE Transactions on Electron Devices<\/em><\/strong>: 2020, 67(4), 1693-1698. \uff08SCI\uff0c2\u533a\uff09<\/strong>


    [2019\u5e74]<\/strong>

    <\/li>\n\n\n\n
  53. A Hardware System for Fast AER Object Classification with On-chip Online Learning<\/a>
         Jinguo Huang, Wei He, Xichuan Zhou, Junxian He, Ying Wang, Cong Shi<\/strong>, Yingcheng Lin*. IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)<\/em><\/strong>: 2019, 85-86.

    <\/li>\n\n\n\n
  54. High-speed Classification of AER Data Based on a Low-cost Hardware System<\/a>
          Jinguo Huang, Yingcheng Lin, Wei He, Xichuan Zhou, Cong Shi*<\/strong>, Nanjian Wu, Gang Luo. IEEE International Conference on ASIC (ASICON)<\/em><\/strong>: 2019, 1-4.

    <\/li>\n\n\n\n
  55. 20,000-fps Visual Motion Magnification on Pixel-parallel Vision Chip<\/a>
         Junxian He, Xichuan Zhou, Yingcheng Lin, Chonglei Sun, Cong Shi*<\/strong>, Nanjian Wu, Gang Luo. IEEE International Conference on ASIC (ASICON)<\/em><\/strong>: 2019, 1-4.

    <\/li>\n\n\n\n
  56. \u57fa\u4e8e\u4eff\u751f\u8fd0\u52a8\u80fd\u91cf\u7279\u5f81\u7684\u5149\u6d41\u8ba1\u7b97\u82af\u7247\u8bbe\u8ba1\u7efc\u8ff0<\/a>
         \u4f55\u4fca\u8d24, \u9ec4\u8fdb\u56fd, \u77f3\u5306*<\/strong>. \u5fae\u7eb3\u7535\u5b50\u4e0e\u667a\u80fd\u5236\u9020<\/em><\/strong>: 2019, 1(3), 141-150.

    <\/li>\n\n\n\n
  57. Systolic Cube: A Spatial 3D CNN Accelerator Architecture for Low Power Video Analysis<\/a>
         Yongchen Wang, Ying Wang, Huawei Li, Cong Shi<\/strong>, Xiaowei Li*. IEEE\/ACM <\/strong><\/em>Design Automation Confernece (DAC)<\/em><\/strong>: 2019, No. 210, 1-6.


    [2018\u5e74]<\/strong>

    <\/li>\n\n\n\n
  58. A Streaming Motion Magnification Core for Smart Image Sensors<\/a>
          Cong Shi*<\/strong>, Gang Luo. IEEE Transactions on Circuits and Systems II: Express Briefs<\/strong><\/em>: 2018, 65(9), 1229-1233. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  59. Comparison of computerized system and human observers for vision assessment based on optomotor response in Rhodopsin knockout mice<\/a>
          Kin-Sang Cho, Jiaxin Xiao, Cong Shi<\/strong>, Karen Chang, Tor Paaske Utheim, Gang Luo, Dong Feng Chen*. Investigative Ophthalmology & Visual Science<\/em><\/strong>: 2018, 59(9), 982. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  60. A Compact VLSI System for Bio-Inspired Visual Motion Estimation<\/a>
          Cong Shi<\/strong>, Gang Luo*. IEEE Transactions on Circuits and Systems for Video Technology<\/em><\/strong>: 2018, 28(4), 1021-1036. \uff08SCI\uff0c1\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  61. Optimization of Optomotor Response-based Visual Function Assessment in Mice<\/a>
         Cong Shi*<\/strong>, Xuedong Yuan, Karen Chang, Kin-Sang Cho, Xinmin Simon Xie, Dong Feng Chen, Gang Luo. Scientific Reports<\/em><\/strong>: 2018, 8(1), 9708. (SCI\uff0c3\u533a)<\/strong>


    [2017\u5e74\u4ee5\u524d]<\/strong>

    <\/li>\n\n\n\n
  62.  66\u20102: Comparison of Flat and Curved Monitors: Eyestrain Caused by Intensive Visual Search Task<\/a>
          Gang Luo*, Ying Chen, Amy Doherty, Rui Liu, Cong Shi<\/strong>, Shuhang Wang, Hoai Le, Eli Peli. SID Symposium Digest of Technical Papers<\/em><\/strong>: 2016, 47(1), 903-906

    <\/li>\n\n\n\n
  63. High speed vision processor with reconfigurable processing element array based on full-custom distributed memory<\/a>
          Zhe Chen, Jie Yang, Cong Shi<\/strong>, Qi Qin, Liyuan Liu, Nanjian Wu*. Japanese Journal of Applied Physics<\/em><\/strong>: 2016, 55(4S), 04EF08. \uff08SCI\uff0c4\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  64. A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor<\/a>
          Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi<\/strong>, Runjian Dou, Qi Qin, Jian Liu, Nanjian Wu*. Science China Information Sciences<\/em><\/strong>: 2015, 58(4), 1-10. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  65. Pixel-parallel feature detection on vision chip<\/a>
          Jie Yang, Cong Shi<\/strong>, Liyuan Liu, Jian Liu, Nanjian Wu*. Electronics Letters<\/em><\/strong>: 2014, 50(24), 1839-1841. \uff08SCI\uff0c4\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  66. A massively parallel keypoint detection and description (MP-KDD) algorithm for high-speed vision chip<\/a>
           Cong Shi<\/strong>, Jie Yang, Liyuan Liu, Nanjian Wu*, Zhihua Wang. Science<\/em> China Information Sciences<\/em><\/strong>: 2014, 57(10), 1-12. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  67. A reconfigurable 256 \u00d7 256 image sensor controller that is compatible for depth measurement<\/a>
        Zhe Chen, Shan Di, Cong Shi<\/strong>, Liyuan Liu, Nanjian Wu*. Chinese Journal of Semiconductors<\/em><\/strong>: 2014,35(10), 105007-6.

    <\/li>\n\n\n\n
  68. A 1000 fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array processor and self-organizing map neural network<\/a>
          Cong Shi<\/strong>, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-Jian Wu*, Zhihua Wang. IEEE Journal of Solid-State Circuits<\/em><\/strong>: 2014, 49(9), 2067-2082. \uff08SCI\uff0c1\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  69. A compact PE memory for vision chip<\/a>
          Cong Shi<\/strong>, Zhe Chen, Jie Yang, Nanjian Wu*, Zhihua Wang. Chinese Journal of Semiconductors<\/em><\/strong>: 2014, 35(9), 095002-7.

    <\/li>\n\n\n\n
  70. A high speed multi-level-parallel array processor for vision chips<\/a>
          Cong Shi<\/strong>, Jie Yang, Nanjian Wu*, Zhihua Wang. Science China Information Sciences<\/em><\/strong>: 2014, 57(6), 1-12. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  71. A high speed 1000 fps CMOS image sensor with low noise global shutter pixels<\/a>
          Yangfan Zhou, Zhongxiang Cao, Qi Qin, Quanliang Li, Cong Shi<\/strong>, Nanjian Wu*. Science China Information Sciences<\/strong><\/em>: 2014, 57(4), 1-8. \uff08SCI\uff0c2\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  72. Heterogeneous vision chip and a LBP based algorithm for high-speed tracking<\/a>
          Jie Yang, Cong Shi<\/strong>, Liyuan Liu, Nanjian Wu*. Electronics Letters<\/em><\/strong>: 2014, 50(6),438-439. \uff08SCI\uff0c4\u533a\uff09<\/strong>

    <\/li>\n\n\n\n
  73. 7.3 A1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network<\/a>
          Cong Shi<\/strong>, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nan-Jian Wu*, Zhihua Wang. IEEE International Solid-State Circuits Conference (ISSCC)<\/em><\/strong>: 2014, 128-129. 

    <\/li>\n\n\n\n
  74. A novel architecture of local memory for programmable SIMD vision chip<\/a>
          Zhe Chen, Jie Yang, Cong Shi<\/strong>, Nanjian Wu*. IEEE International Conference on ASIC (ASICON)<\/em><\/strong>: 2013, 1-4.

    <\/li>\n\n\n\n
  75. A programmable computational image sensor for high-speed vision<\/a>
          Jie Yang, Cong Shi<\/strong>, Xitian Long, Nanjian Wu*. International Symposium on Photoelectronic Detectionand Imaging (ISPDI)<\/em><\/strong>: 2013, 89081T-6.

    <\/li>\n\n\n\n
  76. A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors<\/a>
          Ye Han, Quanliang Li, Cong Shi<\/strong>, Nanjian Wu*. Chinese Journal of Semiconductors<\/em><\/strong>: 2013, 34(8), 085016-6.

    <\/li>\n\n\n\n
  77. A Programmable High Speed Vision System with Superscalar PE and Its Parallel Computing Language<\/a>
          Jie Yang, Cong Shi<\/strong>, Xitian Long, Nanjian Wu*. Open Journal of Applied Sciences<\/em><\/strong>: 2013, 3(1B), 65-67.

    <\/li>\n\n\n\n
  78. A low-power column-parallel ADC for high-speed CMOS image sensor<\/a>
          Ye Han, Quanliang Li, Cong Shi<\/strong>, Liyuan Liu, Nanjian Wu*. International Symposium on Photoelectronic Detection and Imaging (ISPDI)<\/em><\/strong>: 2013, 89082E-7.

    <\/li>\n\n\n\n
  79. \u4e00\u79cd\u57fa\u4e8e\u591a\u7ea7\u5e76\u884c\u5904\u7406\u5668\u7684\u9ad8\u901f\u5b9e\u65f6\u624b\u52bf\u8bc6\u522b\u53ca\u6307\u5c16\u8f68\u8ff9\u8ffd\u8e2a\u7cfb\u7edf<\/a>
          \u9f99\u5e0c\u7530, \u77f3\u5306<\/strong>, \u6768\u6770, \u5434\u5357\u5065*. \u5fae\u7535\u5b50\u5b66\u4e0e\u8ba1\u7b97\u673a<\/em><\/strong>: 2013, 30(12), 90-96.

    <\/li>\n\n\n\n
  80. A high-speed CMOS image sensor with column-parallel single capacitor CDSs and single-slope ADCs<\/a>
          Quanliang Li, Cong Shi<\/strong>, Nanjian Wu*. International Symposium on Photoelectronic Detection and Imaging (ISPDI)<\/em><\/strong>: 2011,819433-6.

    <\/li>\n\n\n\n
  81. A high-speed vision processor based on pixel-parallel PE array and its applications<\/a>
          Cong Shi<\/strong>, Nanjian Wu*, Zhihua Wang. IEEE Youth Conference on Information Computing and Telecommunications (YC-ICT)<\/em><\/strong>: 2010, 57-60.

    <\/li>\n\n\n\n
  82. DSTN sleep transistor sizing with a new approach to estimate the maximum instantaneous current<\/a>
          Yu Sun, Liyi Xiao*, Cong Shi<\/strong>. IEEE International Symposium on Circuits and Systems (ISCAS)<\/em><\/strong>: 2010, 3717-3720.

    <\/li>\n\n\n\n
  83. \u529f\u7387\u95e8\u63a7\u6280\u672f\u4e2d\u7684\u5206\u7c07\u7b97\u6cd5\u548c\u63a7\u5236\u7535\u8def<\/a>
          \u5f20\u5229\u5730, \u8096\u7acb\u4f0a*, \u77f3\u5306<\/strong>. \u5fae\u5904\u7406\u673a<\/em><\/strong>: 2009, 30(5), 31-34.
    <\/li>\n<\/ol>\n\n\n\n

    <\/p>\n\n\n\n

    \u53d1\u660e\u4e13\u5229<\/strong><\/p>\n\n\n\n

      \n
    1. \u8f7b\u91cf\u7ea7\u7247\u4e0a\u5b66\u4e60FPGA\u786c\u4ef6\u67b6\u6784\u53ca\u5176\u8bbe\u8ba1\u65b9\u6cd5.\uff08\u5df2\u6388\u6743\uff09
      \u77f3\u5306*<\/strong>, \u5f20\u9756\u96c5, \u7530\u654f, \u738b\u817e\u9704, \u738b\u6d77\u51b0, \u4f55\u4fca\u8d24, \u5362\u9756, \u9ad8\u704f\u7136. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN115115039A\uff0c2025-04-22

      <\/li>\n\n\n\n
    2. Assessing Visual Function. \uff08\u5df2\u6388\u6743\uff09
      Dong Feng Chen, Gang Luo*, Cong Shi<\/strong>, Kin-Sang Cho. \u7f8e\u56fd\uff0c12213732\uff0c2025-02-04

      <\/li>\n\n\n\n
    3. \u4e00\u79cd\u4f4e\u5149\u7167\u5c0f\u50cf\u7d20CFA\u91c7\u6837\u4e0e\u8fb9\u7f18\u8ba1\u7b97\u8bbe\u5907\u9002\u7528\u7684\u53bb\u9a6c\u8d5b\u514b\u65b9\u6cd5.\uff08\u5df2\u6388\u6743\uff09
      \u77f3\u5306*<\/strong>, \u4efb\u9759, \u674e\u777f, \u738b\u6d77\u51b0, \u9ad8\u704f\u7136, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u738b\u4e3d. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202210763316.0\uff0c2024-09-03

      <\/li>\n\n\n\n
    4. \u57fa\u4e8e\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u7684\u5b9e\u65f6\u6df1\u5ea6\u5b66\u4e60\u65b9\u6cd5\u3001\u7cfb\u7edf\u53ca\u5904\u7406\u5668. \uff08\u5df2\u6388\u6743\uff09
      \u738b\u817e\u9704, \u77f3\u5306*<\/strong>, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u6d77\u51b0, \u55bb\u5251\u4f9d. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202111428759.6\uff0c2024-08-07

      <\/li>\n\n\n\n
    5. \u57fa\u4e8e\u5fc6\u963b\u5668\u7684\u53ef\u7247\u4e0a\u5f3a\u5316\u5b66\u4e60\u8109\u51b2GAN\u6a21\u578b\u53ca\u8bbe\u8ba1\u65b9\u6cd5. \uff08\u5df2\u6388\u6743\uff09
      \u77f3\u5306*<\/strong>, \u5362\u9756, \u7530\u654f, \u738b\u6d77\u51b0, \u55bb\u5251\u4f9d, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u9ad8\u704f\u7136. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL20221055019.5\uff0c2024-08-02

      <\/li>\n\n\n\n
    6. \u57fa\u4e8e\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u7684\u8f7b\u91cf\u7ea7\u7247\u4e0a\u5b66\u4e60\u65b9\u6cd5\u3001\u7cfb\u7edf\u53ca\u5904\u7406\u5668. \uff08\u5df2\u6388\u6743\uff09
      \u738b\u6d77\u51b0, \u77f3\u5306*<\/strong>, \u7530\u654f, \u738b\u817e\u9704, \u4f55\u4fca\u8d24, \u4f55\u796f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202111428757.7\uff0c2024-07-19

      <\/li>\n\n\n\n
    7. \u4e00\u79cd\u57fa\u4e8e\u5f02\u6784\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u7684\u4eba\u8138\u8bc6\u522b\u7684FPGA\u82af\u7247. \uff08\u5df2\u6388\u6743\uff09
      \u5468\u653f\u534e, \u77f3\u5306*<\/strong>, \u949f\u6b63\u9752, \u738b\u6d77\u51b0, \u5468\u559c\u5ddd. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202210361630.6\uff0c2024-05-14

      <\/li>\n\n\n\n
    8. \u57fa\u4e8e\u6df1\u5ea6\u53ef\u5206\u79bb\u5377\u79ef\u7684\u8f7b\u91cf\u7ea7\u795e\u7ecf\u7f51\u7edc\u786c\u4ef6\u52a0\u901f\u5668. \uff08\u5df2\u6388\u6743\uff09
      \u6797\u82f1\u6491, \u674e\u777f, \u77f3\u5306*<\/strong>, \u4f55\u4f1f, \u5f20\u73b2, \u6768\u6676. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202110332526.X\uff0c2023-02-28

      <\/li>\n\n\n\n
    9. \u57fa\u4e8e\u65f6\u95f4\u6b65\u7684\u4e8c\u503c\u8109\u51b2\u56fe\u7684\u8109\u51b2\u5377\u79ef\u795e\u7ecf\u7f51\u7edc\u786c\u4ef6\u52a0\u901f\u5668. \uff08\u5df2\u6388\u6743\uff09
      \u5f20\u73b2, \u6768\u6676, \u77f3\u5306*<\/strong>, \u6797\u82f1\u6491, \u4f55\u4f1f, \u674e\u777f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL202110332549.0\uff0c2022-10-14

      <\/li>\n\n\n\n
    10. \u7f51\u7edc\u7ed3\u6784\u53ef\u914d\u7f6e\u7684\u7c7b\u8111\u82af\u7247\u67b6\u6784.
      \u77f3\u5306*<\/strong>, \u738b\u817e\u9704, \u7530\u654f, \u738b\u6d77\u51b0, \u949f\u6b63\u9752, \u4f55\u4fca\u8d24, \u848b\u9896. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN117273100A\uff0c2023-12-22

      <\/li>\n\n\n\n
    11. \u8111\u4eff\u751f\u7247\u4e0a\u5b66\u4e60\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u53ca\u8fb9\u7f18\u7aef\u795e\u7ecf\u5f62\u6001\u5904\u7406\u5668.
      \u77f3\u5306*<\/strong>, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u738b\u6d77\u51b0, \u55bb\u5251\u4f9d, \u9ad8\u704f\u7136, \u5f20\u9756\u96c5, \u9648\u4e50\u6bc5, \u9648\u601d\u8c6a, \u5eb9\u4e91\u9e4f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116663620A, 2023-08-29

      <\/li>\n\n\n\n
    12. \u4e8b\u4ef6\u9a71\u52a8\u7c7b\u578b\u82af\u7247\u4e2d\u7a81\u89e6\u6743\u91cd\u66f4\u65b0\u65b9\u6cd5\u3001\u82af\u7247\u3001\u7535\u5b50\u8bbe\u5907.
      \u77f3\u5306*<\/strong>, \u738b\u6d77\u51b0, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u55bb\u5251\u4f9d, \u9ad8\u704f\u7136, \u5f20\u9756\u96c5, \u9648\u4e50\u6bc5, \u9648\u601d\u8c6a, \u5eb9\u4e91\u9e4f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116629331A\uff0c2023-08-22

      <\/li>\n\n\n\n
    13. \u57fa\u4e8eCa-LIF\u795e\u7ecf\u5143\u6a21\u578b\u7684Spike-BP\u7247\u4e0a\u5b66\u4e60\u65b9\u6cd5\u3001\u7cfb\u7edf\u53ca\u5904\u7406\u5668.
      \u77f3\u5306*<\/strong>, \u9ad8\u704f\u7136, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u55bb\u5251\u4f9d, \u738b\u6d77\u51b0, \u9648\u601d\u8c6a, \u5f20\u9756\u96c5, \u5eb9\u4e91\u9e4f, \u9648\u4e50\u6bc5. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116629344A\uff0c2023-08-22

      <\/li>\n\n\n\n
    14. \u57fa\u4e8e\u5168\u8109\u51b2HMAX\u6a21\u578b\u7684\u591a\u5c42\u5377\u79ef\u7c7b\u8111\u82af\u7247.
      \u77f3\u5306*<\/strong>, \u4f55\u4fca\u8d24, \u738b\u6d77\u51b0, \u738b\u817e\u9704, \u5f20\u9756\u96c5, \u9ad8\u704f\u7136. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116562350A\uff0c2023-08-08

      <\/li>\n\n\n\n
    15. \u4e00\u79cd\u57fa\u4e8e\u6db2\u4f53\u72b6\u6001\u673a\u7684\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u67b6\u6784.
      \u77f3\u5306*<\/strong>, \u9648\u4e50\u6bc5, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u738b\u6d77\u51b0, \u55bb\u5251\u4f9d, \u9ad8\u704f\u7136. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116562354A\uff0c2023-08-08

      <\/li>\n\n\n\n
    16. \u6df1\u5c42\u8109\u51b2\u795e\u7ecf\u7f51\u7edc\u6a21\u578b\u53ca\u6df1\u5c42SNN\u7247\u4e0a\u5b9e\u65f6\u5b66\u4e60\u5904\u7406\u5668.
      \u77f3\u5306*<\/strong>\uff0c\u5f20\u9756\u96c5, \u7530\u654f, \u738b\u817e\u9704, \u4f55\u4fca\u8d24, \u55bb\u5251\u4f9d, \u9ad8\u704f\u7136, \u738b\u6d77\u51b0, \u9648\u4e50\u6bc5, \u9648\u601d\u8c6a, \u5eb9\u4e91\u9e4f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116562344A\uff0c2023-08-08

      <\/li>\n\n\n\n
    17. \u57fa\u4e8e\u53cc\u6a21\u5f0f\u79ef\u5206\u70b9\u706b\u795e\u7ecf\u5143\u7684\u7247\u4e0a\u8109\u51b2\u7f16\u7801\u5668.
      \u77f3\u5306*<\/strong>, \u5eb9\u4e91\u9e4f, \u949f\u6b63\u9752, \u7530\u654f, \u738b\u6d77\u51b0, \u738b\u817e\u9704, \u4f55\u4fca\u8d24, \u9648\u4e50\u6bc5, \u5f20\u9756\u96c5, \u738b\u4e3d, \u9648\u601d\u8c6a, \u9ad8\u704f\u7136. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN116050487A\uff0c2023-05-02

      <\/li>\n\n\n\n
    18. \u5b58\u5185\u8ba1\u7b97\u88c5\u7f6e\u53ca\u5176\u63a7\u5236\u65b9\u6cd5.
      \u77f3\u5306*<\/strong>, \u9648\u4e50\u6bc5, \u7530\u654f, \u738b\u6d77\u51b0, \u55bb\u5251\u4f9d, \u4f55\u4fca\u8d24. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN115064197A\uff0c2022-09-16

      <\/li>\n\n\n\n
    19. \u57fa\u4e8e\u7b80\u5316SDSP\u7b97\u6cd5\u7684\u8f7b\u91cf\u7ea7\u7247\u4e0a\u5b66\u4e60\u65b9\u6cd5\u3001\u7cfb\u7edf\u53ca\u5904\u7406\u5668. 
      \u9648\u601d\u8c6a, \u77f3\u5306*<\/strong>, \u7530\u654f, \u4f55\u4fca\u8d24, \u738b\u817e\u9704, \u738b\u6d77\u51b0, \u9ad8\u704f\u7136, \u5eb9\u4e91\u9e4f. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aCN115018058A\uff0c2022-09-06

      <\/li>\n\n\n\n
    20. Dynamically reconstructable multistage parallel single instruction multiple data array processing system. 
      Cong Shi<\/strong>, Nanjian Wu*, Xitian Long, Jie Yang, Qi Qin. \u7f8e\u56fd\uff0cUS9449257 B2\uff0c2016-9-20

      <\/li>\n\n\n\n
    21. \u53ef\u52a8\u6001\u91cd\u6784\u7684\u591a\u7ea7\u5e76\u884c\u5355\u6307\u4ee4\u591a\u6570\u636e\u9635\u5217\u5904\u7406\u7cfb\u7edf. 
      \u77f3\u5306<\/strong>\uff0c\u5434\u5357\u5065*\uff0c\u9f99\u5e0c\u7530\uff0c\u6768\u6770\uff0c\u79e6\u7426. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL201210512880.1\uff0c2016-4-27

      <\/li>\n\n\n\n
    22. \u591a\u7aef\u53e3\u8bfb\u5199\u7684\u7247\u5185\u5b58\u50a8\u5668. 
      \u9f99\u5e0c\u7530\uff0c\u6768\u6770\uff0c\u77f3\u5306<\/strong>\uff0c\u5434\u5357\u5065*. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL201310140319.X\uff0c2016-1-20

      <\/li>\n\n\n\n
    23. \u57fa\u4e8e\u591a\u5c42\u6b21\u5e76\u884c\u5904\u7406\u7684\u89c6\u89c9\u5904\u7406\u88c5\u7f6e. 
      \u6768\u6770\uff0c\u5434\u5357\u5065*\uff0c\u77f3\u5306<\/strong>\uff0c\u9f99\u5e0c\u7530. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL201210548515.6\uff0c2015-11-14

      <\/li>\n\n\n\n
    24. \u57fa\u4e8e\u53ef\u7f16\u7a0b\u89c6\u89c9\u82af\u7247\u7684\u89c6\u89c9\u56fe\u50cf\u5904\u7406\u7cfb\u7edf. 
      \u77f3\u5306<\/strong>\uff0c\u5434\u5357\u5065*\uff0c\u9f99\u5e0c\u7530\uff0c\u6768\u6770\uff0c\u79e6\u7426. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL201210088420.0\uff0c2014-9-17

      <\/li>\n\n\n\n
    25. \u4e00\u79cd\u591a\u6b65\u5355\u659c\u6a21\u62df\u6570\u5b57\u4fe1\u53f7\u8f6c\u6362\u88c5\u7f6e. 
      \u674e\u5168\u826f\uff0c\u5434\u5357\u5065*\uff0c\u97e9\u70e8\uff0c\u77f3\u5306<\/strong>. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL201210015324.3\uff0c2014-5-14

      <\/li>\n\n\n\n
    26. \u5206\u5e03\u5f0f\u4f11\u7720\u7ba1\u529f\u7387\u95e8\u63a7\u7535\u8def\u4e2d\u6700\u5927\u7ffb\u8f6c\u7535\u6d41\u7684\u9759\u6001\u4f30\u7b97\u65b9\u6cd5. 
      \u8096\u7acb\u4f0a*\uff0c\u5b59\u5b87\uff0c\u77f3\u5306<\/strong>. \u4e2d\u56fd\uff0c\u516c\u5f00\u53f7\uff1aZL200910072733.5\uff0c2011-7-27  
      <\/li>\n<\/ol>\n\n\n\n

      <\/p>\n","protected":false},"excerpt":{"rendered":"

      \u53d1\u8868\u8bba\u6587 \u3000[2026\u5e74] \u53d1 […]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-17","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/pages\/17","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/comments?post=17"}],"version-history":[{"count":437,"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/pages\/17\/revisions"}],"predecessor-version":[{"id":2681,"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/pages\/17\/revisions\/2681"}],"wp:attachment":[{"href":"https:\/\/www.corticalchip.com\/index.php\/wp-json\/wp\/v2\/media?parent=17"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}